ECEGSS TechTalk – Groq

We are excited to invite all of you again to attend the second TECHNICAL TALK, TECH-TALK, in the INDUSTRY EXPOSURE SERIES.

We are hosting the second event with GROQ on May 13, 202, 11 AM – 12 PM.
The presenters will also do a short DEMO of their product.
Information about FULL-TIME EMPLOYMENT OPPORTUNITIES at the company will follow the event.

We will be giving out one of Amazon (Canada) or UberEats (Canada) GIFT-CARDS (CAD 15 each) to the attending students who register and attend the event for more than 30 minutes. Please find more information about the event below.
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EVENT INFORMATION
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DATE        : Thursday, May 13, 2021
TIME        : 11 AM – 12 PM
REG. LINK   : https://utoronto.zoom.us/meeting/register/tZcvcu-tqDooG9XkKsWL08UGOKdVZ4LZy3ai
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AGENDA:
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11:00-11:20 – Andrew Ling, GM and SW Director, presents on Groq and Path to Win AI Space
11:20-11:35 – Groq Demo by Mark Wong-VanHaren, Visualizer and Scheduler viewer, and presents roles within his organization
11:35-11:40 – Jennifer Hwang presents roles and type of people she’s looking for in the HW organization
11:40-11:50 – Q&A
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TITLE:
Think Fast!  A simplistic approach to tackling machine learning and compute at the end of Moore’s Law.
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ABSTRACT:
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Recently closing a $300M funding round, one of the largest funding rounds in AI chip history, Groq has invented an entirely new approach to solve deep learning workloads and HPC.  Based on dataflow and streaming concepts, the Groq Tensor Streaming Processor is able to achieve a 4x improvement compared to other model GPUs and accelerators.
The TSP is built based on two key observations: (1) machine learning workloads exhibit abundant data parallelism, which can be readily mapped to tensors in hardware, and (2) a deterministic processor with a stream programming model enables precise reasoning and control of hardware components to achieve good performance and power efficiency. The TSP is designed to exploit parallelism inherent in machine-learning workloads including instruction-level, memory concurrency, data and model parallelism. This guarantees determinism by eliminating all reactive elements in the hardware, for example, arbiters and caches. Early ResNet50 image classification results demonstrate 20.4K processed images per second with a batch size of one.
Our first ASIC implementation of the TSP architecture yields a computational density of more than 1 TOp/s per square mm of silicon. This TSP is a 25x29mm 14nm chip operating at a nominal clock frequency of 900MHz. The TSP also demonstrates a novel hardware-software approach to achieve fast yet predictable performance on machine-learning workloads within a desired power envelope. This architecture can be deployed across a broad range of applications, from ML to HPC within the datacenter, where low-latency and high-throughput are critical facets of total cost of ownership.
In this talk, we will explore the Groq TSP and help you understand how its simplistic approach to compute yields significant efficiency for acceleration.
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Speaker Bio.:
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ANDREW LING : General Manager and SW Director
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Andrew Ling received his Ph.D. from the University of Toronto in 2009.  After that, he spent most of his time at Altera, which was later acquired by Intel.  His primary focus at Altera/Intel was the development of the OpenCL compiler and later on, moved into CNN acceleration for FPGAs. He now leads the Groq Canada Design Centre, where they are focused on developing scalable ML software and compiler tools for the Groq TSP.
JENNIFER HWANG :: Director, Hardware Engineering
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Jen is an engineer at heart. She has spent her entire career building ASICs, with over 30 successful tape-outs under her belt. Starting at MIT, Jennifer graduated with her Masters and Bachelors in Electrical Engineering. No stranger to startups, she was a part of Silicon Spice startup, which was acquired by Broadcom. Jen became a Director of Engineering responsible for Broadcom’s cellular processor division for hardware verification with a multi-site global team. At Groq, she is leading the Hardware verification team creating ASICs for machine learning. Specifically, she loves to roll up her sleeves and up to her elbows in the details of how things work. In her free time, she supports her family ? reading, skiing, and serving as a parent-volunteer for her two growing kids at school.
MARK WONG-VANHAREN :: Technical Lead, Groq Tools
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Mark has 30 years experience in software development. He co-founded Excite.com, was CTO of ecommerce site Glyde, and served as VP Ramp;D at Wordnik. Over the years, he’s designed and built a wide range of tools and products, including: a special-purpose search engine, a columnar DBMS, a category-best iPhone app, and a templating language and compiler. At Groq, Mark works on our compiler as well as developer tools. He especially enjoys taking complex problems and mercilessly simplifying, usually using a functional programming language. Mark studied computational linguistics at Stanford and maintains a strong interest in natural and programming languages. Outside of work, Mark enjoys tandem biking and creating music with his family band.
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More Company Info.:
https://www.forbes.com/sites/amyfeldman/2021/04/14/ai-chip-startup-groq-founded-by-ex-googlers-raises-300-million-to-power-autonomous-vehicles-and-data-centers/?sh=2000d63c65e3
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ECEGSS
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